1) Specification Proposal 2) modulator algorithm design 3) demodulator algorithm design 4) FEC(forward error correction) codec algorithm design 5) RTL(Verilog, VHDL) coding 6) synthesis & pre-layout verification 7) FPGA porting & chip implementation 8) FPGA/chip evaluation B/D design   1) RTL(Verilog, VHDL) coding 2) design optimization 3) synthesis & pre-layout verification 4) FPGA porting & chip implementation 5) FPGA/chip evaluation B/D design